Switched-capacitor, SC amplifiers are widely used in filters and oversampling Δ-Σ converters.
FIG. 1 shows a block diagram of a prior art circuit representing a switched-capacitor amplifier which is in the form of a switched-capacitor integrator. An operational amplifier 3 has an inverting input terminal 4, a non-inverting input terminal 5, and an output terminal 6. The output terminal 6 is connected to the inverting input terminal 4 via a capacitor 7. A signal input 8 of the amplifier arrangement according to FIG. 1 is connected via a first switch 9, a series capacitor 10, and a second switch 11 to inverting input 4. Both electrodes of series capacitor 10 are connected to ground via a respective switch 12, 13. The same configuration comprising a series connection of a switch 14, a load capacitor 15 and a switch 16, as well as two switches to ground 17, 18, is arranged between output terminal 6 and signal output 20 of the amplifier arrangement. During a first clock phase 1, switches 9 and 13 are closed to charge the series capacitor 10. In a second clock phase 2, switches 9 and 13 are opened while switches 11 and 12 are closed, thus providing an amplifying phase in which the operational amplifier 3 is active, amplifying a signal charged on the capacitor 10, thereby discharging capacitor 10 and charging the load capacitor 15. To charge the load capacitor 15 during the amplifying clock phase, switches 14 and 18 are closed during clock phase 2, while switches 16 and 17 are opened. In the next phase 1, the load capacitor 15 is connected to the output 20 and to ground via switches 16, 17. At the same time, the series capacitor 10 is charged again with the input signal Vin which is provided at the signal input 8.
At the beginning of the amplification phase 2, a feed forward effect is present due to the capacitive feedback network when the SC amplifier switches from sampling mode to amplification mode. Sampling mode denotes the clock phase 1 during which the series capacitor 10 and the load capacitor 15 are connected to the signal input 8 and the signal output 20, respectively. This non-inverting feed forward path is in opposition to the inverting signal path through the operational amplifier 3 and the negative feedback loop. These two signal paths are described in FIG. 2.
The effect of this feed forward is that the output is driven into an opposite direction at the beginning of the amplification phase with respect to the direction of the voltage in which it should move in order to reach its correct settled value. The feed forward causes an undesirable initial condition, which requires an extra correction from the operational amplifier during slewing. The time that the operational amplifier requires for this slewing process is relatively large, leaving less time for linear settling. The result is that the operational amplifier has to be designed with larger current and bandwidth in order to achieve a given level of accuracy at the desired speed. As a consequence, the power and noise performance of the overall circuit deteriorate. The problem described primarily affects discrete time circuits such as switched-capacitor circuits. Of course, the problem can be circumvented by using a larger load capacitance which is large with respect to the feedback and input capacitances. However, a large load capacitance slows down the operational amplifier and requires more power in turn.
FIG. 3 shows the equivalent circuit of FIG. 1 which is true at the start of the amplification phase. The beginning of the amplification phase can be simulated with a step voltage at the input, resulting in a step voltage at the output, due to the action of the feedforward network.
As described in FIG. 4, at the beginning of the amplification phase, the output signal has an undesired peak in the opposite direction. The resulting response is compared to the ideal response desired in the integrator.